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[ FreeCourseWeb ] Lynda - Learning FPGA Development.rar

  • [ FreeCourseWeb ] Lynda - Learning FPGA Development.rar 177.6 MB
[磁力链接] 添加时间:2021-04-02 大小:177.6 MB 最近下载:2025-07-08 热度:2017

[ FreeCourseWeb.com ] PluralSight - Getting Started with FPGA Programming with VHDL.zip

  • [ FreeCourseWeb.com ] PluralSight - Getting Started with FPGA Programming with VHDL.zip 502.5 MB
[磁力链接] 添加时间:2021-05-08 大小:502.5 MB 最近下载:2025-07-08 热度:1614

Mentor FPGA

  • Mentor FPGA Advantage 8.1.iso 644.1 MB
[磁力链接] 添加时间:2017-06-18 大小:644.1 MB 最近下载:2025-07-08 热度:277

[ DevCourseWeb.com ] Udemy - Hands-on development of cpu- soc on FPGA using vhdl(verilog)

  • ~Get Your Files Here !/18 -888.mp4 461.5 MB
  • ~Get Your Files Here !/14 -how to control memory operation, register operation, alu operation etc.mp4 304.8 MB
  • ~Get Your Files Here !/6 -Extracting instruction set from RISC-V datasheet.mp4 261.9 MB
  • ~Get Your Files Here !/8 -how to setup the read and write register alias table.mp4 203.3 MB
  • ~Get Your Files Here !/7 -introducing the counter-track out-of-order execution.mp4 176.0 MB
  • ~Get Your Files Here !/17 -the cache control.mp4 171.0 MB
  • ~Get Your Files Here !/16 -how to setup the cache control for hit, miss, cache address and memory address.mp4 150.4 MB
  • ~Get Your Files Here !/15 -how control handles cache misses and cache hit.mp4 128.1 MB
  • ~Get Your Files Here !/13 -how to connect different units using the control.mp4 127.9 MB
  • ~Get Your Files Here !/19 -top wiring and conclusion.mp4 110.6 MB
  • ~Get Your Files Here !/3 -accessing resource file.mp4 110.4 MB
  • ~Get Your Files Here !/9 -feedback how to return registers after instruction exec using output buffers.mp4 101.4 MB
  • ~Get Your Files Here !/5 -how to link program memory to instruction buffer and program counter buffer.mp4 86.8 MB
  • ~Get Your Files Here !/11 -architecture of a register bank.mp4 72.5 MB
  • ~Get Your Files Here !/12 -how to handle multiple function units. introducing memory buffers.mp4 54.7 MB
  • ~Get Your Files Here !/10 -How to design a simple ALU.mp4 49.2 MB
  • ~Get Your Files Here !/2 -Architecture of the design.mp4 47.9 MB
  • ~Get Your Files Here !/4 -How to design the program memory.mp4 39.5 MB
  • ~Get Your Files Here !/1 -Introduction.mp4 21.2 MB
  • ~Get Your Files Here !/3 -class_resources.zip 11.6 MB
[磁力链接] 添加时间:2025-01-19 大小:2.7 GB 最近下载:2025-07-08 热度:896

[ DevCourseWeb.com ] Udemy - FPGA Design - Glitch in Counters - Analysis using Simulator (updated).zip

  • [ DevCourseWeb.com ] Udemy - FPGA Design - Glitch in Counters - Analysis using Simulator (updated).zip 2.8 GB
[磁力链接] 添加时间:2021-03-26 大小:2.8 GB 最近下载:2025-07-08 热度:379

[ FreeCourseWeb.com ] Udemy - FPGA Design with MATLAB & Simulink

  • ~Get Your Files Here !/4. Section_4 Advance Design with HDL Coder/1. Section 4 Advance Design with HDL Coder Overview.mp4 162.5 MB
  • ~Get Your Files Here !/3. Section_3 Project with System Generator/2. Section 3 Lab 30 Basic Project with System Generator.mp4 122.9 MB
  • ~Get Your Files Here !/1. Section_1 Installation of MatlabSimulink and VIVADOISE/1. Installation of MatlabSimulink and VIVADOISE.mp4 74.3 MB
  • ~Get Your Files Here !/6. Section_6 Zynq Development with System Generator & VIVADO/1. ZedBoard XADC+ Pmod Interfacing and Implementation on System Generator.mp4 65.7 MB
  • ~Get Your Files Here !/3. Section_3 Project with System Generator/1. Section_3 Basic Project with System Generator Overview.mp4 58.3 MB
  • ~Get Your Files Here !/2. Section_2 Introduction to HDL Coder and System Generator/1. Introduction to HDL Coder and System Generator Part I.mp4 55.8 MB
  • ~Get Your Files Here !/1. Section_1 Installation of MatlabSimulink and VIVADOISE/2. Section 1 Lab 1 Basic Design with Simulink Environment.mp4 51.2 MB
  • ~Get Your Files Here !/2. Section_2 Introduction to HDL Coder and System Generator/2. Introduction to HDL Coder and System Generator Part II.mp4 39.1 MB
  • ~Get Your Files Here !/5. Section_5 Advanced Design with System Generator/1. Lab 51 FIR Filter Design.mp4 34.3 MB
  • ~Get Your Files Here !/3. Section_3 Project with System Generator/3. Lab 31 Basic FFT Design with System Generator.mp4 33.1 MB
  • ~Get Your Files Here !/4. Section_4 Advance Design with HDL Coder/2. LMS Filter Design_Advance Design with HDL Coder.mp4 29.4 MB
  • ~Get Your Files Here !/5. Section_5 Advanced Design with System Generator/2. OFDM Transceiver Design and Simulation Part I Transmitter Section.mp4 19.5 MB
  • ~Get Your Files Here !/3. Section_3 Project with System Generator/4. Lab 32 Creating Custom JTAG Configuration.mp4 18.7 MB
  • ~Get Your Files Here !/5. Section_5 Advanced Design with System Generator/3. OFDM Transceiver Design and Simulation Part II Receiver Section & Simulation.mp4 18.6 MB
  • ~Get Your Files Here !/3. Section_3 Project with System Generator/5. (Optional) Section_3 Lab 32 Demo JTAG Implementation on Spartan 3E from Sys Gen.mp4 11.1 MB
  • ~Get Your Files Here !/4. Section_4 Advance Design with HDL Coder/hdl_coder_lms/original_speech.wav 4.0 MB
  • ~Get Your Files Here !/4. Section_4 Advance Design with HDL Coder/Section-4-Advance-Design-with-HDL-Coder-with-installation-V2.pdf 3.2 MB
  • ~Get Your Files Here !/2. Section_2 Introduction to HDL Coder and System Generator/Section-2-V2-Introduction-to-HDL-Coder-and-System-Generator.pdf 2.0 MB
  • ~Get Your Files Here !/3. Section_3 Project with System Generator/Section-3-Basic-Project-with-System-Genrator-V2.pdf 1.3 MB
  • ~Get Your Files Here !/1. Section_1 Installation of MatlabSimulink and VIVADOISE/Section-1-V2-Installing-Tools-Matlab-Simulink-and-ISE-VIVADO.pdf 1.1 MB
[磁力链接] 添加时间:2022-04-18 大小:806.4 MB 最近下载:2025-07-08 热度:1871

Digital Design Using Digilent FPGA Boards VHDL.pdf

  • Digital Design Using Digilent FPGA Boards VHDL.pdf 61.9 MB
[磁力链接] 添加时间:2017-02-19 大小:61.9 MB 最近下载:2025-07-08 热度:450

[ FreeCourseWeb.com ] Udemy - FPGA Design - Glitch in Counters - Analysis using Simulator.zip

  • [ FreeCourseWeb.com ] Udemy - FPGA Design - Glitch in Counters - Analysis using Simulator.zip 2.0 GB
[磁力链接] 添加时间:2021-04-08 大小:2.0 GB 最近下载:2025-07-08 热度:598

Bruno F., Eschemann G. - The FPGA Programming Handbook - 2024

  • Bruno F., Eschemann G. - The FPGA Programming Handbook - 2024.epub 35.0 MB
  • Bruno F., Eschemann G. - The FPGA Programming Handbook - 2024.pdf 31.4 MB
[磁力链接] 添加时间:2024-06-08 大小:66.4 MB 最近下载:2025-07-08 热度:3203

Haskell R. Digital Design Using Digilent FPGA Boards...2010

  • Haskell R. Digital Design Using Digilent FPGA Boards...2010.pdf 160.3 MB
  • Wakerly J. Digital Design. Principles and Practices 4ed 2006.pdf 111.1 MB
  • Haskell R. Learning By Example Using VHDL...2009.pdf 84.2 MB
  • Harris S. Digital Design and Computer Architecture ARM Ed 2016.pdf 35.9 MB
  • Harris S. Digital Design and Computer Architecture 2ed 2013.pdf 25.9 MB
  • Harris D. Digital Design and Computer Architecture. RISC-V Ed 2022.pdf 24.5 MB
  • Mano M. Digital Design With an Introduction to the VHDL 6ed 2017.pdf 23.6 MB
  • Mano M. Digital Design With an Introduction to the VHDL 6ed 2019.pdf 20.4 MB
  • Wakerly J. Digital Design. Principles and Practices 5ed 2018.pdf 19.9 MB
  • Mano M. Digital Design With an Introduction to the VHDL 5ed 2013.pdf 3.1 MB
  • Readme.txt 836 Bytes
[磁力链接] 添加时间:2022-02-18 大小:509.1 MB 最近下载:2025-07-08 热度:1305

[ DevCourseWeb.com ] Udemy - Vivado 2020 - Learn Fpga Development Today!

  • ~Get Your Files Here !/3 - VHDL/13 - Implement your design.mp4 55.5 MB
  • ~Get Your Files Here !/5 - Processor options/20 - Testing and Simulating.mp4 51.6 MB
  • ~Get Your Files Here !/3 - VHDL/12 - Simulating your VHDL code.mp4 48.6 MB
  • ~Get Your Files Here !/5 - Processor options/26 - Generate HDL commands from c based code.mp4 39.2 MB
  • ~Get Your Files Here !/5 - Processor options/24 - Implement a Micro blaze soft Processor.mp4 38.5 MB
  • ~Get Your Files Here !/4 - Memory/19 - Creating a memory block in the integrator.mp4 36.2 MB
  • ~Get Your Files Here !/3 - VHDL/10 - Creating your first project in Vivado.mp4 33.2 MB
  • ~Get Your Files Here !/3 - VHDL/8 - Intro to VHDL.mp4 30.4 MB
  • ~Get Your Files Here !/1 - Introduction/1 - The digital design fundamentals you must learn.mp4 25.8 MB
  • ~Get Your Files Here !/2 - Digital systems/2 - Analog and Digital Systems.mp4 24.2 MB
  • ~Get Your Files Here !/4 - Memory/17 - IP integrator in Vivado.mp4 24.0 MB
  • ~Get Your Files Here !/5 - Processor options/25 - Learn TCL Commands to generate Micro blaze soft processor.mp4 23.8 MB
  • ~Get Your Files Here !/2 - Digital systems/5 - Download and install Vivado.mp4 20.6 MB
  • ~Get Your Files Here !/4 - Memory/16 - IP Flows.mp4 19.6 MB
  • ~Get Your Files Here !/5 - Processor options/23 - Processor Options.mp4 18.3 MB
  • ~Get Your Files Here !/4 - Memory/18 - Memory Controllers.mp4 18.1 MB
  • ~Get Your Files Here !/6 - Conclusion/29 - Conclusion.mp4 18.0 MB
  • ~Get Your Files Here !/3 - VHDL/9 - FPGA Design Flow.mp4 17.2 MB
  • ~Get Your Files Here !/2 - Digital systems/4 - FPGA Architecture.mp4 17.0 MB
  • ~Get Your Files Here !/3 - VHDL/11 - Vivado Design Tools.mp4 16.8 MB
[磁力链接] 添加时间:2024-01-02 大小:669.5 MB 最近下载:2025-07-08 热度:1669

[ FreeCourseWeb.com ] Udemy - VLSI Course Series - FPGA Architecture Basics.zip

  • [ FreeCourseWeb.com ] Udemy - VLSI Course Series - FPGA Architecture Basics.zip 258.6 MB
[磁力链接] 添加时间:2021-04-01 大小:258.6 MB 最近下载:2025-07-08 热度:986

FPGA Development in VHDL - Beyond the Basics

  • 03.Working with Custom Data Types/09.Summary.srt 832 Bytes
  • 07.Testing Your Designs/05.Summary.srt 1.0 kB
  • 04.Monitoring Signal States with Attributes/01.Overview.srt 1.1 kB
  • 06.Constructing State Machines/07.Summary.srt 1.1 kB
  • 07.Testing Your Designs/01.Overview.srt 1.1 kB
  • 04.Monitoring Signal States with Attributes/06.Type Kind Attributes.srt 1.1 kB
  • 06.Constructing State Machines/03.State Machine Types.srt 1.2 kB
  • 03.Working with Custom Data Types/01.Overview.srt 1.3 kB
  • 04.Monitoring Signal States with Attributes/02.What Are Attributes.srt 1.4 kB
  • 06.Constructing State Machines/01.Overview.srt 1.4 kB
  • 05.Keeping Code Organized with Subprograms and Packages/07.Summary.srt 1.4 kB
  • 02.Developing for the FPGA/02.Module Overview.srt 1.5 kB
  • 03.Working with Custom Data Types/04.Subtypes.srt 1.5 kB
  • 05.Keeping Code Organized with Subprograms and Packages/01.Overview.srt 1.5 kB
  • 02.Developing for the FPGA/08.Summary.srt 1.5 kB
  • 04.Monitoring Signal States with Attributes/08.Summary.srt 1.7 kB
  • 03.Working with Custom Data Types/05.Multidimensional Arrays.srt 1.8 kB
  • 01.Course Overview/01.Course Overview.srt 2.0 kB
  • 06.Constructing State Machines/02.What Is a State Machine.srt 2.2 kB
  • 03.Working with Custom Data Types/06.Record Types.srt 2.6 kB
[磁力链接] 添加时间:2017-07-06 大小:541.2 MB 最近下载:2025-07-08 热度:3313

FPGA Design Learning VHDL

  • FPGA Design Learning VHDL.tgz 1.7 GB
  • Torrent downloaded from demonoid.pw.txt 46 Bytes
  • Torrent Downloaded From ExtraTorrent.cc.txt 352 Bytes
[磁力链接] 添加时间:2017-02-12 大小:1.7 GB 最近下载:2025-07-07 热度:2102

fpga-gnw-opt

  • Hardware - Frame/Crab Grab (White case).gnw 3.3 MB
  • Hardware - Frame/Crab Grab.gnw 3.3 MB
  • Hardware - Frame/Donkey Kong II.gnw 3.3 MB
  • Hardware - Frame/Donkey Kong Jr. (New Wide Screen).gnw 3.3 MB
  • Hardware - Frame/Donkey Kong.gnw 3.3 MB
  • Hardware - Frame/Fire Attack (Bandits).gnw 3.3 MB
  • Hardware - Frame/Fire Attack.gnw 3.3 MB
  • Hardware - Frame/Green House.gnw 3.3 MB
  • Hardware - Frame/Life Boat.gnw 3.3 MB
  • Hardware - Frame/Manhole (New Wide Screen).gnw 3.3 MB
  • Hardware - Frame/Mario Bros..gnw 3.3 MB
  • Hardware - Frame/Mario's Cement Factory (New Wide Screen).gnw 3.3 MB
  • Hardware - Frame/Mickey & Donald.gnw 3.3 MB
  • Hardware - Frame/Oil Panic.gnw 3.3 MB
  • Hardware - Frame/Rain Shower.gnw 3.3 MB
  • Hardware - Frame/Snoopy Tennis.gnw 3.3 MB
  • Hardware - Frame/Spitball Sparky (White case).gnw 3.3 MB
  • Hardware - Frame/Spitball Sparky.gnw 3.3 MB
  • Hardware - Frame/Squish.gnw 3.3 MB
  • Hardware - Frame/Tropical Fish.gnw 3.3 MB
[磁力链接] 添加时间:2024-10-19 大小:1.6 GB 最近下载:2025-07-07 热度:1403

[ FreeCourseWeb.com ] Udemy - FPGA Drive UART.zip

  • [ FreeCourseWeb.com ] Udemy - FPGA Drive UART.zip 707.1 MB
[磁力链接] 添加时间:2021-05-22 大小:707.1 MB 最近下载:2025-07-07 热度:365

[ FreeCourseWeb.com ] Udemy - FPGA Embedded Design, Part 2 - Basic FPGA Training.zip

  • [ FreeCourseWeb.com ] Udemy - FPGA Embedded Design, Part 2 - Basic FPGA Training.zip 1.4 GB
[磁力链接] 添加时间:2021-04-15 大小:1.4 GB 最近下载:2025-07-07 热度:3032

Learn VHDL, ISE and FPGA by Designing a Basic Home Alarm

  • Torrent downloaded from demonoid.pw.txt 46 Bytes
  • Torrent Downloaded From ExtraTorrent.cc.txt 352 Bytes
  • LEARN_VHDL_ISE_AND_FPGA_BY_DESIGNING.tgz 2.1 GB
[磁力链接] 添加时间:2017-02-14 大小:2.1 GB 最近下载:2025-07-07 热度:2698

[ DevCourseWeb.com ] Udemy - Verilog on Intel (Altera) FPGA.zip

  • [ DevCourseWeb.com ] Udemy - Verilog on Intel (Altera) FPGA.zip 3.1 GB
[磁力链接] 添加时间:2021-03-14 大小:3.1 GB 最近下载:2025-07-07 热度:1946

fpga-gnw-opt

  • Hardware - Frame/Crab Grab (White case).gnw 3.3 MB
  • Hardware - Frame/Crab Grab.gnw 3.3 MB
  • Hardware - Frame/Donkey Kong II.gnw 3.3 MB
  • Hardware - Frame/Donkey Kong Jr. (New Wide Screen).gnw 3.3 MB
  • Hardware - Frame/Donkey Kong.gnw 3.3 MB
  • Hardware - Frame/Fire Attack (Bandits).gnw 3.3 MB
  • Hardware - Frame/Fire Attack.gnw 3.3 MB
  • Hardware - Frame/Green House.gnw 3.3 MB
  • Hardware - Frame/Life Boat.gnw 3.3 MB
  • Hardware - Frame/Manhole (New Wide Screen).gnw 3.3 MB
  • Hardware - Frame/Mario Bros..gnw 3.3 MB
  • Hardware - Frame/Mario's Cement Factory (New Wide Screen).gnw 3.3 MB
  • Hardware - Frame/Mickey & Donald.gnw 3.3 MB
  • Hardware - Frame/Oil Panic.gnw 3.3 MB
  • Hardware - Frame/Rain Shower.gnw 3.3 MB
  • Hardware - Frame/Snoopy Tennis.gnw 3.3 MB
  • Hardware - Frame/Spitball Sparky (White case).gnw 3.3 MB
  • Hardware - Frame/Spitball Sparky.gnw 3.3 MB
  • Hardware - Frame/Squish.gnw 3.3 MB
  • Hardware - Frame/Tropical Fish.gnw 3.3 MB
[磁力链接] 添加时间:2023-12-19 大小:1.2 GB 最近下载:2025-07-07 热度:2607


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