为您找到约 70 个磁力链接/BT种子，耗时 0 毫秒。
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[ DevCourseWeb.com ] Udemy - FPGA Drive SPI TFT LCD.zip

  • [ DevCourseWeb.com ] Udemy - FPGA Drive SPI TFT LCD.zip 767.2 MB
[磁力链接] 添加时间:2021-04-27 大小:767.2 MB 最近下载:2025-10-28 热度:988

fpga-gnw-opt

  • Hardware - Frame/Crab Grab (White case).gnw 3.3 MB
  • Hardware - Frame/Crab Grab.gnw 3.3 MB
  • Hardware - Frame/Donkey Kong II.gnw 3.3 MB
  • Hardware - Frame/Donkey Kong Jr. (New Wide Screen).gnw 3.3 MB
  • Hardware - Frame/Donkey Kong.gnw 3.3 MB
  • Hardware - Frame/Fire Attack (Bandits).gnw 3.3 MB
  • Hardware - Frame/Fire Attack.gnw 3.3 MB
  • Hardware - Frame/Green House.gnw 3.3 MB
  • Hardware - Frame/Life Boat.gnw 3.3 MB
  • Hardware - Frame/Manhole (New Wide Screen).gnw 3.3 MB
  • Hardware - Frame/Mario Bros..gnw 3.3 MB
  • Hardware - Frame/Mario's Cement Factory (New Wide Screen).gnw 3.3 MB
  • Hardware - Frame/Mickey & Donald.gnw 3.3 MB
  • Hardware - Frame/Oil Panic.gnw 3.3 MB
  • Hardware - Frame/Rain Shower.gnw 3.3 MB
  • Hardware - Frame/Snoopy Tennis.gnw 3.3 MB
  • Hardware - Frame/Spitball Sparky (White case).gnw 3.3 MB
  • Hardware - Frame/Spitball Sparky.gnw 3.3 MB
  • Hardware - Frame/Squish.gnw 3.3 MB
  • Hardware - Frame/Tropical Fish.gnw 3.3 MB
[磁力链接] 添加时间:2024-10-19 大小:1.6 GB 最近下载:2025-10-28 热度:1575

[ FreeCourseWeb ] Lynda - Learning FPGA Development.rar

  • [ FreeCourseWeb ] Lynda - Learning FPGA Development.rar 177.6 MB
[磁力链接] 添加时间:2021-04-02 大小:177.6 MB 最近下载:2025-10-28 热度:2133

FPGA视频教程

  • Lesson01：课程概述与如何学好FPGA.wmv 48.3 MB
  • Lesson02：可编程逻辑器件基础.wmv 191.0 MB
  • Lesson03：FPGA开发流程概述.wmv 67.6 MB
  • Lesson04：Verilog语法基础.wmv 147.7 MB
  • Lesson05：BJ-EPM240学习板介绍.wmv 115.4 MB
  • Lesson06：Quartus.II使用简介与第一个工程实例.wmv 212.6 MB
  • Lesson07：BJ-EPM240学习板实验1——分频计数实验.wmv 138.2 MB
  • Lesson08：简单的Testbench设计.wmv 82.9 MB
  • Lesson09：BJ-EPM240学习板实验2——按键消抖实验.wmv 114.6 MB
  • Lesson10：BJ-EPM240学习板实验3——Johnson.计数器实验.wmv 189.3 MB
  • Lesson11：BJ-EPM240学习板实验4——数码管显示实验.wmv 30.3 MB
  • Lesson12：BJ-EPM240学习板实验5——乘法器设计实验.wmv 91.0 MB
  • Lesson13：BJ-EPM240学习板实验6——VGA接口实验.wmv 110.7 MB
  • Lesson14：BJ-EPM240学习板实验7——串口通信实验.wmv 182.8 MB
  • Lesson15：BJ-EPM240学习板实验8——PS2键盘解码实验.wmv 111.0 MB
  • Lesson16：BJ-EPM240学习板实验9——I2C通信实验.wmv 139.2 MB
  • Lesson17：BJ-EPM240学习板实验10——SRAM读写实验.wmv 114.0 MB
  • Lesson18：BJ-EPM240学习板实验11——MAX.II内部震荡时钟使用实例.wmv 115.0 MB
  • Lesson19：BJ-EPM240学习板实验12——MAX.II的UFM模块使用实例.wmv 90.3 MB
  • Lesson20：BJ-EPM240学习板实验13——Quartus.II调用ModelSim仿真实例.wmv 85.2 MB
[磁力链接] 添加时间:2017-06-08 大小:4.0 GB 最近下载:2025-10-28 热度:454

[FreeTutorials.Us] Udemy - Learn VHDL and FPGA Development

  • 10. Xilinx Tools/1.1 Digilent Inc. - Digital Design Engineer's Source.html 208 Bytes
  • 10. Xilinx Tools/1.2 Xilinx ISE Download.html 158 Bytes
  • 10. Xilinx Tools/1. Xilinx Tools Introduction.mp4 1.4 MB
  • 10. Xilinx Tools/1. Xilinx Tools Introduction.srt 1.3 kB
  • 10. Xilinx Tools/1. Xilinx Tools Introduction.vtt 1.2 kB
  • 10. Xilinx Tools/2. Download the Vivado Tool Suite for the BASYS 3.mp4 38.7 MB
  • 10. Xilinx Tools/2. Download the Vivado Tool Suite for the BASYS 3.srt 9.1 kB
  • 10. Xilinx Tools/2. Download the Vivado Tool Suite for the BASYS 3.vtt 8.0 kB
  • 10. Xilinx Tools/3. ISim VHDL Simulation Tool.mp4 4.9 MB
  • 10. Xilinx Tools/3. ISim VHDL Simulation Tool.srt 2.7 kB
  • 10. Xilinx Tools/3. ISim VHDL Simulation Tool.vtt 2.3 kB
  • 10. Xilinx Tools/4. Xilinx ISE FPGA Development Tool.mp4 9.7 MB
  • 10. Xilinx Tools/4. Xilinx ISE FPGA Development Tool.srt 9.0 kB
  • 10. Xilinx Tools/4. Xilinx ISE FPGA Development Tool.vtt 7.9 kB
  • 10. Xilinx Tools/5. Programming The BASYS 2 FPGA Development Board.mp4 1.9 MB
  • 10. Xilinx Tools/5. Programming The BASYS 2 FPGA Development Board.srt 2.1 kB
  • 10. Xilinx Tools/5. Programming The BASYS 2 FPGA Development Board.vtt 1.8 kB
  • 10. Xilinx Tools/6. Xilinx Tools.html 163 Bytes
  • 11. Lab 1 - Full Adder/1.1 Lab-1.zip.zip 6.9 kB
  • 11. Lab 1 - Full Adder/1. Introduction.mp4 6.0 MB
[磁力链接] 添加时间:2018-09-14 大小:2.1 GB 最近下载:2025-10-28 热度:1406

[ FreeCourseWeb.com ] Udemy - FPGA Design - Glitch in Counters - Analysis using Simulator.zip

  • [ FreeCourseWeb.com ] Udemy - FPGA Design - Glitch in Counters - Analysis using Simulator.zip 2.0 GB
[磁力链接] 添加时间:2021-04-08 大小:2.0 GB 最近下载:2025-10-27 热度:715

HDL Books - VHDL FPGA CPLD Verilog Digital Electronics eBook

  • 0131972553 - (2005) Digital Fundamentals.pdf 492.0 MB
  • 0126912955 - (2000) Engineering Digital Design.pdf 50.6 MB
  • 0792397460 - (1996) LOGIC SYNTHESIS AND VERIFICATION ALGORITHMS.pdf 41.7 MB
  • 0965193438 - (1996) HDL Chip Design- A Practical Guide for Designing, Synthesizing and Simulating ASICs and FPGAs Using VHDL or Verilog.pdf 40.6 MB
  • 0471720925 - (2006) RTL Hardware Design Using VHDL Coding for Efficiency, Portability, and Scalability.pdf 35.8 MB
  • 0072460857 - (2005) Fundamentals of Digital Logic with VHDL Design.pdf 35.6 MB
  • 0132543036 - (2011) Digital Electronics - A Practical Approach with VHDL - 9th Edition.pdf 33.6 MB
  • 0470828498 - (2011) Design for Embedded Image Processing on FPGAs.pdf 28.7 MB
  • 0070471649 - (1999) Verilog Digital System Design.pdf 28.3 MB
  • 0134516753 - (1996) Verilog HDL A Guide to Digital Design and Synthesis B.pdf 22.4 MB
  • 0470185317 - (2008) FPGA Prototyping by VHDL Examples - Xilinx Spartan-3 Version.pdf 22.3 MB
  • 0131543180 - (2005) Practical FPGA Programming in C.chm 18.2 MB
  • 1402055293 - (2007) Processor Design System-On-Chip Computing for ASICs and FPGAs.pdf 15.6 MB
  • 0387284850 - (2006) FPGA Implementations of neural networks.pdf 14.7 MB
  • 0136507638 - (1996) VHDL Made Easy.pdf 13.8 MB
  • 0412616505 - (1997) VHDL A logic synthesis approach.pdf 13.4 MB
  • 1934404055 - (2007) Digital Circuit Analysis and Design with Simulink Modeling and Introduction to CPLDs and FPGAs 2nd Ed.pdf 13.4 MB
  • 0077221435 - (2008) Fundamentals of Digital Logic with VHDL Design - Ed. 3.pdf 12.8 MB
  • 0792395980 - (1995) VHDL Coding Styles and Methodologies.pdf 12.7 MB
  • 0123744385 - (2009) Low-Power Design of Nanometer FPGAs Architecture and EDA.pdf 12.6 MB
[磁力链接] 添加时间:2017-02-25 大小:1.2 GB 最近下载:2025-10-27 热度:5753

[ WebToolTip.com ] Udemy - FPGA Timings P2 - Clock Domain Crossing(CDC) with Vivado 2024

  • ~Get Your Files Here !/1 - Getting Started with Vivado CDC/11 -False Violations.mp4 43.0 MB
  • ~Get Your Files Here !/2 - Synchronizer/8 -Usage of ASYNC_REG attributes P1.mp4 42.2 MB
  • ~Get Your Files Here !/3 - Single bit CDC/12 -xpm_cdc_single used case P2.mp4 39.8 MB
  • ~Get Your Files Here !/2 - Synchronizer/5 -Synchronizer.mp4 39.8 MB
  • ~Get Your Files Here !/3 - Single bit CDC/6 -Async Reset P3.mp4 38.7 MB
  • ~Get Your Files Here !/2 - Synchronizer/1 -Why combinational output should not be used as input to synchronizer P1.mp4 36.5 MB
  • ~Get Your Files Here !/1 - Getting Started with Vivado CDC/22 -Understanding report_cdc P3.mp4 35.3 MB
  • ~Get Your Files Here !/4 - Multibit CDC/16 -Counter Crossing Manual Approach P7.mp4 34.5 MB
  • ~Get Your Files Here !/2 - Synchronizer/15 -Using Primitives in CDC flow P2.mp4 32.3 MB
  • ~Get Your Files Here !/4 - Multibit CDC/31 -Understanding XPM_CDC_HANDSHAKE P2.mp4 31.2 MB
  • ~Get Your Files Here !/4 - Multibit CDC/32 -Understanding XPM_CDC_HANDSHAKE P3.mp4 30.9 MB
  • ~Get Your Files Here !/1 - Getting Started with Vivado CDC/26 -Understanding report_cdc info P4.mp4 30.3 MB
  • ~Get Your Files Here !/1 - Getting Started with Vivado CDC/23 -Understanding report_cdc info P1.mp4 30.1 MB
  • ~Get Your Files Here !/3 - Single bit CDC/10 -Understanding xpm_cdc_single.mp4 29.7 MB
  • ~Get Your Files Here !/2 - Synchronizer/2 -Why combinational output should not be used as input to synchronizer P2.mp4 29.3 MB
  • ~Get Your Files Here !/1 - Getting Started with Vivado CDC/7 -Demonstration P2.mp4 29.3 MB
  • ~Get Your Files Here !/5 - MTBF/3 -Understanding MTBF & Improving strategies P3.mp4 29.1 MB
  • ~Get Your Files Here !/4 - Multibit CDC/28 -Understanding xpm_fifo_async P2.mp4 27.3 MB
  • ~Get Your Files Here !/1 - Getting Started with Vivado CDC/9 -Clock Interaction report P2.mp4 27.2 MB
  • ~Get Your Files Here !/4 - Multibit CDC/30 -Understanding XPM_CDC_HANDSHAKE P1.mp4 26.9 MB
[磁力链接] 添加时间:2025-07-13 大小:1.9 GB 最近下载:2025-10-27 热度:153

[ DevCourseWeb.com ] Udemy - Verilog on Intel (Altera) FPGA.zip

  • [ DevCourseWeb.com ] Udemy - Verilog on Intel (Altera) FPGA.zip 3.1 GB
[磁力链接] 添加时间:2021-03-14 大小:3.1 GB 最近下载:2025-10-27 热度:1975

[ FreeCourseWeb.com ] Udemy - Learn VHDL Design using Xilinx Zynq-7000 ARM-FPGA SoC.zip

  • [ FreeCourseWeb.com ] Udemy - Learn VHDL Design using Xilinx Zynq-7000 ARM-FPGA SoC.zip 1.6 GB
[磁力链接] 添加时间:2021-04-22 大小:1.6 GB 最近下载:2025-10-27 热度:2342

Bruno F. The FPGA Programming Handbook. An essential guide..FPGA design 2ed 2024

  • Code_2021.zip 117.9 MB
  • Bruno F. The FPGA Programming Handbook. An essential guide..FPGA design 2ed 2024.pdf 31.4 MB
  • ColorImages.pdf 28.6 MB
  • Bruno F. FPGA Programming for Beginners...with SystemVerilog 2021.pdf 17.1 MB
  • ColorImages_2021.pdf 12.5 MB
  • Code.zip 697.3 kB
[磁力链接] 添加时间:2024-09-14 大小:208.3 MB 最近下载:2025-10-26 热度:6190

FPGA Advantage 8.1

  • Keygen/Mentor.kg.02.03.09.rar 873.4 kB
  • fa.exe 643.2 MB
  • READMEPC.TXT 4.8 kB
[磁力链接] 添加时间:2017-02-10 大小:644.1 MB 最近下载:2025-10-26 热度:859

National Instruments LabView v8.6 FPGA Module

  • TLF-SOFT-NI.LabVIEW.v8.6.FPGA.Module.ISO-TBE-CD1.bin 684.1 MB
  • TLF-SOFT-NI.LabVIEW.v8.6.FPGA.Module.ISO-TBE-CD1.cue 114 Bytes
  • TLF-SOFT-NI.LabVIEW.v8.6.FPGA.Module.ISO-TBE-CD2.bin 767.6 MB
  • TLF-SOFT-NI.LabVIEW.v8.6.FPGA.Module.ISO-TBE-CD2.cue 114 Bytes
  • TLF-SOFT-NI.LabVIEW.v8.6.FPGA.Module.ISO-TBE.nfo 11.7 kB
[磁力链接] 添加时间:2017-02-20 大小:1.5 GB 最近下载:2025-10-25 热度:1504

[ DevCourseWeb.com ] Udemy - Vivado 2020 - Learn Fpga Development Today!

  • ~Get Your Files Here !/3 - VHDL/13 - Implement your design.mp4 55.5 MB
  • ~Get Your Files Here !/5 - Processor options/20 - Testing and Simulating.mp4 51.6 MB
  • ~Get Your Files Here !/3 - VHDL/12 - Simulating your VHDL code.mp4 48.6 MB
  • ~Get Your Files Here !/5 - Processor options/26 - Generate HDL commands from c based code.mp4 39.2 MB
  • ~Get Your Files Here !/5 - Processor options/24 - Implement a Micro blaze soft Processor.mp4 38.5 MB
  • ~Get Your Files Here !/4 - Memory/19 - Creating a memory block in the integrator.mp4 36.2 MB
  • ~Get Your Files Here !/3 - VHDL/10 - Creating your first project in Vivado.mp4 33.2 MB
  • ~Get Your Files Here !/3 - VHDL/8 - Intro to VHDL.mp4 30.4 MB
  • ~Get Your Files Here !/1 - Introduction/1 - The digital design fundamentals you must learn.mp4 25.8 MB
  • ~Get Your Files Here !/2 - Digital systems/2 - Analog and Digital Systems.mp4 24.2 MB
  • ~Get Your Files Here !/4 - Memory/17 - IP integrator in Vivado.mp4 24.0 MB
  • ~Get Your Files Here !/5 - Processor options/25 - Learn TCL Commands to generate Micro blaze soft processor.mp4 23.8 MB
  • ~Get Your Files Here !/2 - Digital systems/5 - Download and install Vivado.mp4 20.6 MB
  • ~Get Your Files Here !/4 - Memory/16 - IP Flows.mp4 19.6 MB
  • ~Get Your Files Here !/5 - Processor options/23 - Processor Options.mp4 18.3 MB
  • ~Get Your Files Here !/4 - Memory/18 - Memory Controllers.mp4 18.1 MB
  • ~Get Your Files Here !/6 - Conclusion/29 - Conclusion.mp4 18.0 MB
  • ~Get Your Files Here !/3 - VHDL/9 - FPGA Design Flow.mp4 17.2 MB
  • ~Get Your Files Here !/2 - Digital systems/4 - FPGA Architecture.mp4 17.0 MB
  • ~Get Your Files Here !/3 - VHDL/11 - Vivado Design Tools.mp4 16.8 MB
[磁力链接] 添加时间:2024-01-02 大小:669.5 MB 最近下载:2025-10-25 热度:1838

FPGA Filter

  • 2 - FPGA Median Filter/7 - FPGA Median Filter 04 Median Module Coding.mp4 95.6 MB
  • 1 - FPGA Mean Average Filter/3 - FPGA Mean Average Filter 03 Simulation.mp4 71.7 MB
  • 2 - FPGA Median Filter/8 - FPGA Median Filter 05 Median Module Simulation.mp4 67.3 MB
  • 3 - FPGA Gaussian Filter/11 - FPGA Gaussian Filter 03 Simulation.mp4 67.1 MB
  • 3 - FPGA Gaussian Filter/10 - FPGA Gaussian Filter 02 Coding.mp4 63.5 MB
  • 2 - FPGA Median Filter/6 - FPGA Median Filter 03 Sort Module Simulation.mp4 63.1 MB
  • 1 - FPGA Mean Average Filter/2 - FPGA Mean Average Filter 02 Coding.mp4 52.8 MB
  • 2 - FPGA Median Filter/5 - FPGA Median Filter 02 Sort Module Coding.mp4 47.8 MB
  • 3 - FPGA Gaussian Filter/9 - FPGA Gaussian Filter 01 Introduction.mp4 32.3 MB
  • 2 - FPGA Median Filter/4 - FPGA Median Filter 01 Introduction.mp4 17.4 MB
  • 1 - FPGA Mean Average Filter/1 - FPGA Mean Average Filter 01 Introduction.mp4 11.5 MB
  • 2 - FPGA Median Filter/7 - FPGA Median Filter 04 English.vtt 13.4 kB
  • 3 - FPGA Gaussian Filter/10 - FPGA Gaussian Filter 02 English.vtt 9.3 kB
  • 2 - FPGA Median Filter/8 - FPGA Median Filter 05 English.vtt 7.7 kB
  • 1 - FPGA Mean Average Filter/3 - FPGA Mean Average Filter 03 English.vtt 7.4 kB
  • 1 - FPGA Mean Average Filter/2 - FPGA Mean Average Filter 02 English.vtt 7.2 kB
  • 2 - FPGA Median Filter/6 - FPGA Median Filter 03 English.vtt 7.0 kB
  • 3 - FPGA Gaussian Filter/11 - FPGA Gaussian Filter 03 English.vtt 6.8 kB
  • 2 - FPGA Median Filter/5 - FPGA Median Filter 02 English.vtt 6.5 kB
  • 3 - FPGA Gaussian Filter/9 - FPGA Gaussian Filter 01 English.vtt 6.3 kB
[磁力链接] 添加时间:2023-12-19 大小:590.2 MB 最近下载:2025-10-25 热度:2107

[CourseClub.Me] Coursera - FPGA computing systems Background knowledge and introductory materials

  • 07_design-flows/02_xilinx-partial-reconfiguration-design-flows/05_moudle-based-vs-partial-reconfiguration-design-flows.mp4 93.3 MB
  • 04_examples-on-how-to-configure-an-fpga/01_an-example-on-how-to-configure-a-clb/01_4-inputs-1-output-or-lut-configuration-example.mp4 63.8 MB
  • 04_examples-on-how-to-configure-an-fpga/01_an-example-on-how-to-configure-a-clb/02_from-the-lut-to-the-clb-configuration-example.mp4 49.7 MB
  • 05_an-introduction-to-reconfigurations/04_a-classification-of-reconfigurations/02_a-classification-of-somc-reconfigurations.mp4 42.7 MB
  • 05_an-introduction-to-reconfigurations/04_a-classification-of-reconfigurations/01_a-classification-of-soc-reconfigurations.mp4 36.7 MB
  • 05_an-introduction-to-reconfigurations/02_the-5-w-s/01_the-5-w-s.mp4 28.1 MB
  • 01_a-birds-eye-view-on-adaptive-computing-systems/03_adaptive-computing-systems/05_programmable-system-on-multiple-chip.mp4 27.4 MB
  • 03_reconfigurable-computing-and-fpgas/01_getting-familiar-with-fpgas/03_fpga-basic-block-interconnections.mp4 24.2 MB
  • 03_reconfigurable-computing-and-fpgas/02_on-how-to-configure-an-fpga/04_configuration-registers.mp4 23.3 MB
  • 03_reconfigurable-computing-and-fpgas/01_getting-familiar-with-fpgas/02_fpga-basic-block-clbs-and-iobs.mp4 23.3 MB
  • 07_design-flows/02_xilinx-partial-reconfiguration-design-flows/02_xilinx-difference-based-partial-reconfiguration.mp4 22.3 MB
  • 01_a-birds-eye-view-on-adaptive-computing-systems/02_fpga-and-reconfiguration/01_fpga-and-reconfiguration-a-1st-definition.mp4 21.9 MB
  • 05_an-introduction-to-reconfigurations/01_a-common-vocabulary/01_a-common-vocabulary.mp4 21.1 MB
  • 01_a-birds-eye-view-on-adaptive-computing-systems/01_class-intro/03_the-needs-for-adaptation-an-overview.mp4 20.5 MB
  • 07_design-flows/01_xilnx-design-flows-through-years/01_xilnx-design-flows-through-years.mp4 20.4 MB
  • 07_design-flows/02_xilinx-partial-reconfiguration-design-flows/03_xilinx-module-based-partial-reconfiguration.mp4 20.2 MB
  • 07_design-flows/02_xilinx-partial-reconfiguration-design-flows/04_xilinx-partial-reconfiguration-pr-flow.mp4 20.0 MB
  • 07_design-flows/02_xilinx-partial-reconfiguration-design-flows/01_partial-reconfiguration-design-flows.mp4 20.0 MB
  • 01_a-birds-eye-view-on-adaptive-computing-systems/03_adaptive-computing-systems/04_programmable-system-on-chip.mp4 18.1 MB
  • 02_an-introduction-to-reconfigurable-computing/01_reconfigurable-computing/04_fpga-based-reconfigurable-computing.mp4 15.6 MB
[磁力链接] 添加时间:2024-05-23 大小:762.1 MB 最近下载:2025-10-25 热度:1217

[ CourseLala.com ] Udemy - FPGA Piano

  • ~Get Your Files Here !/8. One Key Module Coding.mp4 190.6 MB
  • ~Get Your Files Here !/2. Make Buzzer Buzzing.mp4 184.6 MB
  • ~Get Your Files Here !/9. One Key Module Simulation.mp4 128.6 MB
  • ~Get Your Files Here !/6. Buzzer Module Simulation.mp4 108.1 MB
  • ~Get Your Files Here !/5. Buzzer Module Coding.mp4 101.6 MB
  • ~Get Your Files Here !/12. Key Module Solution2 Coding.mp4 88.4 MB
  • ~Get Your Files Here !/11. Key Module Solution1 Simultion.mp4 87.2 MB
  • ~Get Your Files Here !/10. Key Module Solution1 Coding.mp4 74.9 MB
  • ~Get Your Files Here !/16. LED Module Simulation.mp4 71.6 MB
  • ~Get Your Files Here !/19. Run on Board.mp4 66.7 MB
  • ~Get Your Files Here !/18. Top Module Simulation.mp4 66.7 MB
  • ~Get Your Files Here !/17. Top Module Coding.mp4 59.1 MB
  • ~Get Your Files Here !/1. System Target.mp4 57.9 MB
  • ~Get Your Files Here !/15. LED Module Coding.mp4 48.3 MB
  • ~Get Your Files Here !/7. Key Module Status Machine.mp4 33.3 MB
  • ~Get Your Files Here !/13. Key Module Solution2 Simulation.mp4 23.1 MB
  • ~Get Your Files Here !/4. Buzzer Module Status Machine.mp4 18.1 MB
  • ~Get Your Files Here !/3. System Analysis.mp4 15.4 MB
  • ~Get Your Files Here !/14. LED Module Status Machine.mp4 10.1 MB
  • ~Get Your Files Here !/8. One Key Module Coding.srt 31.9 kB
[磁力链接] 添加时间:2024-07-14 大小:1.4 GB 最近下载:2025-10-23 热度:1022

Xilinx Vivado Beginners Course to FPGA Development in VHDL

  • Beginners Course to FPGA Development in VHDL.tgz 447.2 MB
  • Torrent downloaded from demonoid.pw.txt 46 Bytes
  • Torrent Downloaded From ExtraTorrent.cc.txt 352 Bytes
[磁力链接] 添加时间:2017-03-26 大小:447.2 MB 最近下载:2025-10-21 热度:1735

neo-geo-1g1r-darksoft-converted-to-neosd-mister-fpga

  • NEOGEO.zip 1.8 GB
  • neo-geo-1g1r-darksoft-converted-to-neosd-mister-fpga_meta.sqlite 28.7 kB
  • neo-geo-1g1r-darksoft-converted-to-neosd-mister-fpga_meta.xml 3.7 kB
[磁力链接] 添加时间:2024-08-25 大小:1.8 GB 最近下载:2025-10-21 热度:1229

[ FreeCourseWeb.com ] Udemy - FPGA Drive 7 Segment Display.zip

  • [ FreeCourseWeb.com ] Udemy - FPGA Drive 7 Segment Display.zip 1.2 GB
[磁力链接] 添加时间:2021-04-22 大小:1.2 GB 最近下载:2025-10-21 热度:1775


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